The present invention relates generally to semiconductor device processing techniques, and, more particularly, to a method for reducing dendrite formation in nickel silicide (NiSi) salicide processes.
In the manufacture of semiconductor devices, salicide (or self-aligned silicide) materials are formed upon gate conductors and diffusion regions to reduce the [contact/line] resistance of a CMOS device, thereby improving the speed characteristics thereof. In salicide technology, a refractory metal or a near noble metal, such as titanium for example, is deposited on a silicon substrate. The deposited metal is then annealed, thereby forming a metal silicide layer only on the exposed areas of the substrate. The areas of unreacted metal left on the dielectric may then be selectively etched away without a masking step. Thus, the process is “self-aligning.”
As circuit devices have continued to shrink in size, however, it has been found that titanium silicide (TiSi2) becomes an unsatisfactory silicide material since the sheet resistance thereof begins to sharply increase when the linewidth of the device decreases below 0.20 :m. More recently, materials such as cobalt disilicide (CoSi2) and nickel silicide (NiSi) have been used as replacements for titanium in salicide structures since they generally do not suffer from a linewidth dependent sheet resistance problem. On the other hand, the use of cobalt silicide structures is not without its own drawbacks. For example, unlike titanium, a cobalt layer requires a cap layer such as titanium nitride (TiN) due to the sensitivity of cobalt to contaminants during the annealing process.
One difficulty associated with the NiSi salicide process is the formation of dendrites or “pipes” in the source/drain regions of a device though the conversion of the metal rich layer. The time and temperature window for the formation of NiSi is thus limited by the need for minimizing the reaction of metal over the insulator layers of the device that can subsequently form NiSi. In particular, if metal rich silicide regions remain after the initial anneal and etch steps, then subsequent thermal processing steps can result in the further conversion of nickel to NiSi (in the form of NiSi dendrites extending beyond the boundaries of the originally intended silicide regions). In turn, a growth of silicide material beneath spacers can result in adverse effects such as bit failures in an SRAM array, for example.
Presently, the problem of NiSi dendrite formation is addressed by simply reducing the time and temperature anneals, as well as the back end thermal budget. Unfortunately, for such an approach, the process window and resulting yield is unsatisfactory in view of this scheme for controlling silicide growth. Accordingly, it would be desirable to be able to control the formation of dendrites in the NiSi salicide process, but in a manner that maintains acceptable process window margins.